Parth Gediya
Design & Verification Engineer
- Role
- Senior Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Parth Gediya
Design & Verification engineer with a experience in core and ip level verification for…
Experience
Senior Engineer
Jun 2024 — Present · Bengaluru, IN
Education
ITM_Universe
Bachelor of Engineering - BE, Electronics and Communications Engineering
2015 — 2019
VIT_Vellore Institute of Technology
Master of Technology - MTech, VLSI
2019 — 2021
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