Pariya Maghsoodi

Process Engineer @Headway Technologies

San Francisco, CA, US
EMAILS
p••••••••@tdk.com
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Jun 2024 — Present

Process Engineer @Headway Technologies

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Milpitas, CA, US

Led process development and characterization of electrodeposited alloys and metals to optimize material properties for advanced magnetic recording heads. Enhanced and stabilized thin film deposition processes and high-volume wafer fabrication equipment to ensure consistent quality. Collaborated closely with equipment, integration, and design teams to drive process optimization and improve manufacturing reliability. Conducted failure analysis and root cause investigations on defective wafers to enhance the performance of critical devices and materials, implementing corrective actions to strengthen process capability. Applied a wide variety of advanced material characterization techniques. Established and maintained robust process control strategies in high-volume production, utilizing DOE and SPC, and JMP to reduce variation, improve yield, and ensure long-term process stability.Managing Multiple projects at the same time.

EDUCATION

2007 — 2012

University of Isfahan

Bachelor's degree, Physics

2013 — 2015

University of Kashan

Master's degree, Nanotechnology

2015 — 2016

Karlsruhe Institute of Technology (KIT)

Visiting Scholar

2018

University of New Mexico School of Engineering

Doctor of Philosophy - PhD, Nanoscience and Microsystem Engineering

2024

Weill Cornell Graduate School of Medical Sciences

Postgraduate Degree, Materials Engineering

ABOUT PARIYA MAGHSOODI

Material engineer with a background in Physics, Nanotechnology, MEMS, and extensive…

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