Dipen Parikh
Experienced ASIC Design Engineer
- Role
- Technical Director Asic Design Engineer at NXP Semiconductors
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Dipen Parikh
Digital design engineer with experience in ASIC and FPGA logic design, as well as design verification, synthesis, formal verification, Lint checks, CDC, STA, ECO, ATPG and troubleshooting in digital domain. Possess extensive knowledge of complete product cycle in wireless semiconductor chip industry.Specialties: Verilog, Cadence - Simvision, Cadence - Schematic Capture & Virtuoso, Synopsys DC, Synopsys Primetime, Formality(R), Spyglass, TetraMAX, Altera Quartus II, MATLAB, VHDL, HTML, Microsoft SharePoint, Perl.
Experience
Technical Director Asic Design Engineer
Nov 2019 — Present · San Jose, CA, US
Education
Nirma University
B.Tech., Electronics & Communication
2005 — 2009
Navrachana
Science
1993 — 2005
UC San Diego
M.S., Electronic Circuits & Systems
2009 — 2011
Skills
- Verilog
- Asic
- Fpga
- Logic Design
- Logic Synthesis
- Modelsim
- Altera Quartus
- Cadence Schematic Capture
- Pspice
- Sharepoint Designer
- Html
- Technical Documentation
- Matlab
- Cadence Virtuoso
- Perl
- Vhdl
- Formality
- Integrated Circuit Design
- Simulations
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