Parag Mhatre

Pre Silicon and Post Silicon Validation Manager at Texas Instruments

Role
Engineering Manager at Texas Instruments
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Parag Mhatre

20+ years experience in VLSI and Application Validation (Pre/Post Si) working on WLAN, DSL, Wireless baseband,Wireless Application Processor, TI MSP, Wireless Connectivity SoC and TI Sitara Platform.Present : Leading Apps Validation team for TI Sitara Processor Platform.Worked on Front end VLSI design and Verification, system validation and silicon validation mainly in the area of WLAN Soc, DSL Soc, Wireless Baseband Soc, Wireless OMAP Application processor Soc, TI MSP SOC\'s, Wireless Connectivity SOC\'s and TI Sitara Platform. Handled technical responsibilities of leading verification teams for WLAN chip and emulation team for Wireless baseband and OMAP Application processor. Mainly seen as a emulation expert within TI have been working on various emulation platform like Cadence Palladium and Eve Zebu. Worked on Silicon validation area for OMAP SoC with exposure to address Customer requested feature validation.Specialties: Expert on Cadence Palladium emulation platform.Expertise in Design Verification/Validation and Silicon bringup and validation.Expertise in Application/Customer driven usecases validation for million gate Soc

Experience

  1. Engineering Manager

    Texas Instruments

    Feb 2013 — Present

    Managing Application Verification and Validation team for Low Power ARM based MSP SoC\'s. I am responsible for managing Pre-Silicon and Post Silicon validation for LP ARM based MSP SoC\'s and delivering emulation platform (Palladium/Zebu/Virtex5 based FPGA\'s) for WW teams (Apps/Tools/Debugger).

Education

  • COEP Technological University

    Bachelor of Engineering (B.E.), Electronics and Telecomm

    1996 — 1999

  • COEP Technological University

    Bachelor of Engineering (B.E.), Electronics and Telecommunication

    1996 — 1999

Skills

  • Vhdl
  • Wlan
  • Fpga
  • Asic
  • Rtl Coding
  • Functional Verification
  • Soc
  • Atpg
  • Emulation
  • Specman
  • Very-Large-Scale Integration (Vlsi)
  • Power Management
  • Omap
  • Silicon Validation
  • Amba Ahb
  • Verilog
  • Low-Power Design
  • Arm
  • Vlsi
  • Rtl Design
  • Cadence

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Parag Mhatre — Engineering Manager at Texas Instruments in Bengaluru, KA, IN | Unifers