Panchami D. S
Analog Mixed-signal Design Engineer at Qualcomm
- Role
- High Speed i o Design Engineer at 高通
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
High Speed i o Design Engineer
Jun 2021 — Present · San Diego, US
Education
St. Joseph Engineering College
Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering
2012 — 2015
Canara College
Pre University, PCMB
2009 — 2011
Arizona State University
Master's degree, Electrical and Electronics Engineering
2019 — 2021
Skills
- Keil
- Xilinx
- Microsoft Office
- 3d Studio Max
- Xilinx Ise
- Pcb Design
- Proteus
- Verilog
- Digital Electronics
- Html 5
- Microcontrollers
- 8051 Microcontroller
- C
- Vhdl
- Multisim
- Electronics
- Soldering
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.