Palle Ramya
Engineer 2 @Analog Port
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WORK HISTORY
Engineer 2 @Analog Port
Hyderabad, IN
EDUCATION
Osmania University, Hyderabad
Master's Degree, Applied Electronics
SumedhaIT Hyderabad
., Analog / Custom Layout Design Trainee
ABOUT PALLE RAMYA
Knowledge on TSMC 65nm, 28nm planar, 16nm 7 & 6nm Finfet Technologies also 18A or 1.8nm GAAFET Technology • Knowledge on tools: Cadence virtuoso & Mentor graphics calibre (DRC & LVS)• Knowledge on EMIR, Antenna, Latchup, Well proximity effect, Length of diffusion, Cross-talk & Shielding, ESD, Matching techniques, Fingers & Multipliers• Knowledge on CMOS fundamentals• Knowledge on CMOS fabrication process • Knowledge on Basics of Digital Electronics• Knowledge on Basics of Linux PROJECTS ON 65 & 28 nm:# Basic gates ( inverter, nand, nor, and,or )# XOR, XNOR# Half adder, Half subtractor, Full adder, Full subtractor# Differential Pair, Current mirror# ON 16 & 7nm:# Basic gates (inverter, buffer, nand,nor, and, or)# Pass Transistor and Delay Cell # Voltage Control Oscillator# Phase Frequency DetectorGmail ID : p••••••••@gmail.com
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