Pallavi Sharma
Pre-Si Logic Validation Engineer at Intel Corporation
- Role
- Gpu Design Verification Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Pallavi Sharma
IP Design Engineer, 6+ year experience.~ Validation Engineer with a demonstrated history of working development of IP level verification and Subsystem level verification- PHY level verification and debugging for protocol s -PCIe/Ethernet/XCVR~ System Verilog, UVM based test bench verification.~ Experienced in Verification ( Functional and DFx- Design for debug and validation) of High Speed IO.~ Exposure to post silicon debug.
Experience
Gpu Design Verification Engineer
Jun 2024 — Present
Education
Thapar Institute of Engineering & Technology
Master of Technology - MTech, VLSI Design
2016 — 2018
Baddi University of Emerging Sciences and Technology, Budha (Makhnumajra), Solan
Bachelor of Technology (BTech), Electronics and Communications Engineering
2011 — 2015
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