Padmini Patil
Analog layout engineer
- Role
- Analog Layout Designer at HCLTech
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Padmini Patil
Completed Masters in microelectronics in Manipal Institute of Technology (2024). having key skills in digital layout design and have practiced on Cadence virtuoso tool 180nm technology and now taking training on analog layout design in Eklakshya innovation labs limited,Hubli.and completed intern in the Kaiga porwer plant,Karwar(NPCIL).Intending to be associated with an esteemed organization that provides an opportunity to utilize skills to my full potential, improve knowledge with the latest trends & to be a part of the team that works dynamically towards the growth of the organization & the country.
Experience
Analog Layout Designer
Aug 2024 — Present
Education
Jain College of Engineering, BELGAUM
Bachelor of Engineering - BE, Electrical and Electronics Engineering
2016 — 2020
Manipal Institute of Technology
Master of Technology - MTech, Microelectronics
Manipal Institute of Technology
Master's degree, Microelectronics
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