Padmini Devi Godithi
Experienced Firmware Validation Engineer | AI Accelerators • GPU/TPU/NPU System | Datacenter Platforms | PCIe Specialist | UEFI/BIOS, BMC, OpenBMC | Expert in Python and GenAI | Specialized in Embedded
- Role
- Senior Firmware Validation Engineer at Microsoft
- Location
- Vancouver, WA, US
- LinkedIn followers
- 500 followers
About Padmini Devi Godithi
I am a Senior Firmware Validation Engineer specializing in AI accelerator platforms, embedded firmware, and large-scale datacenter systems. My current work includes validating Microsoft’s Azure Maia 100/200/300 AI accelerator firmware, focusing on boot flows, telemetry, memory/HBM reporting, PCIe connectivity, RAS, power/thermal control, and rack-level system behavior used to run large-scale AI workloads.I bring 16+ years of experience across firmware validation, silicon bring-up, BMC/OpenBMC platforms, server management, automation frameworks, and cross-layer debugging involving firmware, RTL, silicon, BIOS, and platform engineering.What I specialize in:AI accelerator firmware validation (Maia-class platforms)Pre-/post-silicon bring-up, emulation/FPGA testingMemory subsystem telemetry (HBM/DDR), PCIe Gen5, RASBootloader and secure firmware update validationPower/thermal control loops and high-power accelerator behaviorPython-based automation frameworks and CI pipelinesJTAG, logic analyzers, oscilloscopes, lab debugBMC/OpenBMC, Redfish/IPMI, datacenter management firmwareI thrive in high-velocity engineering environments with bi-weekly firmware drops, multi-team integration, and platform readiness gates. Passionate about reliable systems, scalable automation, and shaping the next generation of AI hardware.
Experience
Senior Firmware Validation Engineer
Aug 2024 — Present · Seattle, WA, US
I validate firmware for Microsoft’s Azure M 100/200 AI accelerator platforms, focusing on boot flows, telemetry, power/thermal governance, HBM and PCIe subsystem behavior, and Azure rack-level system stability. My work spans pre-silicon bring-up, early silicon testing, bi-weekly firmware release validation, and cross-functional debug with silicon, RTL, BIOS, and platform teams. I build Python-based automation frameworks, execute deep system-level analysis, and ensure high-quality firmware for hyperscale AI workloads.Lead system integration validation for Azure M AI accelerator firmware across accelerator board, host, and rack systemsValidate HBM telemetry, PCIe link training, and accelerator power/thermal behavior under AI workload simulationsAutomate firmware update, telemetry verification, and regression workflows using Python and CI pipelinesCollaborate with silicon/RTL, firmware, BIOS, and platform teams to root-cause failure signaturesValidate in-band and out-of-band telemetry propagation into Azure management and monitoring stacksPerform pre-silicon/early silicon bring-up on emulation and FPGA platformsDrive firmware readiness for each bi-weekly release cycle, including risk assessment and validation coverage sign-off
Education
Simplilearn Alumni
Data Analyst Master Program
Manipal Institute of Technology
Bachelor of Engineering - BE, Computer Science
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