Padma Priyadarshini
Intermediate Rf Design Engineer @Airspan Networks
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WORK HISTORY
Intermediate Rf Design Engineer @Airspan Networks
Plano, TX, US
Designing and developing small signal RF circuits for radio base stations supporting multiple radioaccess technologies, including 5G, 4G/LTE, and GSM.>> Conducting requirements analysis and define system specifications.>> Performing frequency planning, link budget analysis, and component selection to meet performanceand compliance standards.>> Utilizing advanced schematic capture and PCB layout tools for hardware design.>> Working on hardware bring-up, debugging, and performance optimization activities in the lab.>> Performing detailed RF lab measurements, including S-parameters, noise figure, gain, and linearitycharacterization.>> Collaborating with cross-functional teams, including software, mechanical, and systems engineering,to deliver integrated solutions.
EDUCATION
The University of Texas at Dallas
Master's degree, RF and Antenna Engineering
KIIT University
Bachelor’s Degree, Electrical and Electronics Engineering
Delhi Public School - Ranchi
High School, Mathematics
ABOUT PADMA PRIYADARSHINI
Working as RF Design Engineer at Airspan Networks where I design RF section of the baseband radios. I am currently working for the NTIA NOFO funded project.>> RF system design (RF link and power budget) for various products (Baseband radios, cellular repeaters) using ADS/MS-Excel.>> Worked on floor planning of baseband radios with mechanical team to make sure the radios pass the thermal tests.>> Worked with various vendors to design the custom RF parts like cavity filters, SAW/BAW filters, LNAs, Power Amplifiers, etc.>> Delivered two products (cellular repeaters) as lead engineer of the project while working for the Wilson Connectivity. Worked through entire product development cycle.>> Performed floor planning and layout for various 6-layer PCBs using Altium Designer 2016/2023.>> Characterization of cellular signal repeaters for carrier specific and agnostic application.>> Defined product performance limits for the factory production.>> Designed balanced filter for band 25/66, Band 12/13 and Band 26 for higher power handling and validated the same on PCB.>> Designed inter-stage matching network (between PA and the front-end module) for LTE FDD bands on ADS. Matched to achieve flat gain and maximum linear o/p power while maintaining Tx to Rx isolation.>> Characterized the PA from different vendors for linear o/p power, IMD performance, stability over supply voltage and temp. Matched the best among them on a test PCB with the front-end filters for max o/p power. Advised different teams on the implementation and debugged the issues encountered by them.>> Modeled the 3rd order intermodulation performance of a PA using Turlington’s curve fit method on real-time data.>> Multiplexed Band 12, 13 and 5 using transmission line and lumped components (without using discrete diplexer) to save cost.>> Performed LTE based testing on the booster. Set the automatic gain control limits to prevent LTE compression, EVM degradation (CCDF measurement) in case of strong signals.>> Designed a simulation model in ADS to estimate variation in inductance/Q of inductors when placed on PCBs to study parasitic capacitance effect; Performed measurements for validation.>> Characterized low noise amplifier for military application for Ka-band (17GHz-23GHz).>> Assembled the amplifier stages in cascade; process included metal carriers lapping, plasma cleaning, epoxying the boards on metal carriers and SMD components, wire bonding, ribbon welding, soldering under microscope. Performed the heat cycle tests in temperature chamber.
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