Omid Azarnik

About Omid Azarnik

ASIC Engineer with design-centric expertise, performing both Design and Verification with 8+ years of industry experience. Experienced with front-end high-speed application IP development, and SoC design. Hands-on experienced with low latency, low power design techniques, and RTL coding using Verilog/SystemVerilog. Involved in all front-end aspects of multiple multi-billion/million gate ASIC designs from specification to tape-out. Hands-on experience high-speed interconnect application (Ethernet, Fiber-Channel, and OTN). Skills- RTL Design from specification to tape-out- ASIC design flow, CDC, SDC, Timing closure, Lint, Logic-Equivalence-Check- FPGA design flow, timing closure- Verification, Building Testbenches, Functional verification, Coverage - Verilog, SystemVerilog (UVM)Hands-on Experience:SoC Design- AI Accelerator : Chip-to-Chip communication / Die-to-Die communication- Power manager and Clock manager designEthernet/FlexO/OTN- 1.6TE/800GE/400GE/200GE/100GE/50GE/40GE/25GE/10GE MAC+PCS- Forward Error Correction (FEC), KR4 FEC, KP4 FEC- Fiber-Channel : 128GFC/64GFC/32GFC/16GFC/12GFC- SGMII/QSGMIIFPGA- AES Encryption/Decryption- Intel FPGA S10 Signal Integrity (SI) board (E-Tile/H-Tile)- Xilinx VCU129 and VCU140 boardsTools- Cadence Xcelium/NCSim/Simvision/Genus/Innovus/Tempus/Conformal, Synopsys VCS/Verdi/DC/FC/SpyGlass/VC/Formality, Intel Quartus, Xilinx Vivado, MentroGraphics ModelSim/Questasim- Linux, SVN, git, vim, make, python, tcl, perl

Experience

1. Member of Technical Staff

   Etched

   Dec 2024 — Present · San Jose, CA, US

Education

• University of Tehran

  Bachelor’s Degree, Electrical Engineering (Major: Electronics)

  2009 — 2014

• Concordia University

  Master's degree, Master of Engineering in Electrical Engineering

  2014 — 2016

Skills

• Cadence Virtuoso
• C
• Programming
• Microsoft Office
• Universal Verification Methodology (Uvm)
• Matlab
• Conformal Lec
• Systemc
• Ubuntu
• Verilog
• Electronics
• Microsoft Word
• Modelsim
• Windows
• Field-Programmable Gate Arrays (Fpga)
• Systemverilog
• Questa
• Circuit Design
• Svn
• Silicon Photonics
• Cmos
• Integrated Circuits (Ic)
• Synopsys Formality
• Testing
• Embedded Systems
• Altium Designer
• Very-Large-Scale Integration (Vlsi)
• Analog Circuit Design
• C++
• Powerpoint
• Synopsys Tools
• Vhdl
• Simulations