Oliver Bell

R & d Engineering Director, Interface Ip @Synopsys Inc

Munich, DE
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Feb 2025 — Present

R & d Engineering Director, Interface Ip @Synopsys Inc

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Munich, DE

Leading the development of PCIe native controller IP, enabling high-speed connectivity for next gen SoCs.

EDUCATION

N/A

Georg-Simon-Ohm University of applied Sciences Nürnberg, Germany

Microelectronics

SKILLS

VerilogSystemverilogEmbedded SystemsEdaIntegrated Circuit DesignFpgaEmbedded SoftwareAsicEngineering LeadershipWirelessApplication-Specific Integrated Circuits (Asic)Functional VerificationSystemcProcessorsArmMicrocontrollersCmosIntegrated Circuits (Ic)VhdlSimulationsStatic Timing AnalysisSemiconductor IndustryField-Programmable Gate Arrays (Fpga)System on a Chip (Soc)Rtl DesignSemiconductorsDebuggingIcDigital Signal ProcessorsMixed SignalCoachingFormal VerificationSignal ProcessingSocTestingVlsiTcl

ABOUT OLIVER BELL

Engineering leader in digital ASIC and SoC development, delivering complex SoCs and interface IP from concept to product. Experienced in SoC execution across architecture, RTL, and physical design, using advanced EDA flows and AI-driven verification to enable shift-left and predictable, high-quality silicon.Empathetic leader building high-performing, multi-disciplinary teams, driving technical strategy, and working closely with EDA, foundry, and IP partners. Co-initiator of DVCon Europe.

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Oliver Bell — R & d Engineering Director, Interface Ip at Synopsys Inc in Munich, DE | Unifers