Ojaswa Singh

Staff Engineer at Marvell Technology

Role
Senior Design Engineer at 意法半導體
Location
Lucknow, UP, IN
LinkedIn followers
500 followers

About Ojaswa Singh

Key work areas in the VLSI domain:• Worked on GPIOs, LVDS, I2C• Good understanding of semiconductor device fundamentals• Knowledge of analog basic blocks like Opamp, BGR, Comparators• A sound understanding of electrical specifications provided by various standards like JEDEC, NXP, MIPI, TI • Deep understanding of Transmission lines effects on PCB• Professional User of Cadence Virtuoso• All kind of simulations including Relxpert and SOA• Closely worked with Test Chips• Contributed significantly in Silicon qualification of many Analog IPs

Experience

  1. Senior Design Engineer

    意法半導體

    Feb 2021 — Present · Noida, IN

Education

  • SHRI RAMSWAROOP MEMORIAL COLLEGE OF ENGINEERING AND MANAGEMENT, LUCKNOW

    Bachelor of Technology, Electrical, Electronics and Communications Engineering

    2014 — 2018

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Ojaswa Singh — Senior Design Engineer at 意法半導體 in Lucknow, UP, IN | Unifers