Nupur Kandalkar
- Role
- Soc Design Engineer at Intel
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
Experience
Soc Design Engineer
May 2022 — Present
Education
MCT's Rajiv Gandhi Institute Of Technology
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
2011 — 2015
University of Southern California
Master's degree, Electrical and Electronics Engineering
2015 — 2017
Skills
- Windows
- Perl
- Cadence Virtuoso
- Modelsim
- Synopsys Tools
- Powerpoint
- C
- C++
- Microsoft Excel
- Vls
- Xilinx Ise
- Tetramax
- Ncsim
- Synopsys Primetime
- Rtl Coding
- Vhdl
- Cadence Encounter
- Very-Large-Scale Integration (Vlsi)
- Python
- Eda
- Microsoft Word
- Digital Circuit Design
- Mac Os
- Matlab
- Verilog
- Application-Specific Integrated Circuits (Asic)
- Linux
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