Nithin Valentine
Senior DFT Engineer at NVIDIA
- Role
- Senior Dft Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Nithin Valentine
Senior DFT Engineer with 9 years of experience in Low power DFT Scan and Capture, multi dielet testing, ATPG, JTAG, DFT power/noise/temperature measurement and impact. Experienced in RTL design, verification, and timing.Experienced in Fmodel design using C++ and System C.
Experience
Senior Dft Engineer
Jun 2016 — Present · Santa Clara, US
DFX Methodology for multi dielet systems - Scan, JTAG, MBIST and IOBISTSLM (Silicon Life Cycle Management)/Sensor measurement during testing - temperature and noiseDFX Power methodology - low power techniques for Scan shift, capture, MBISTJTAG power verificationRTL Design and VerificationFunctional model developmentSystemC model development
Education
Govt. Model Engineering College
Bachelor of Technology (B.Tech.), Electronics and Communication
2008 — 2012
University of Southern California
Master of Science (MS), Electrical and Electronics Engineering
2014 — 2016
Skills
- Rtl Design
- Multisim
- Semiconductors
- Vlsi
- Circuit Design
- Tcl
- Analog
- System on a Chip (Soc)
- Asic
- Vhdl
- Simulations
- C++
- Perl
- Eda
- Very-Large-Scale Integration (Vlsi)
- Electronics
- Sram
- Linux
- C
- Soc
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