Nitheesh Augustine

WORK HISTORY

EDUCATION

ABOUT NITHEESH AUGUSTINE

Worked on ISP (Image signal processor ) with Automotive certification for PPA targetsWorked on High band width memory with 3.2 GHz, 2 GHz, as well as memory controller SoC with a speed of 450MHz and 1.1 GHz speed.• worked on UFS subsystem with unipro, mphy and LBIST. This project was automotive rule deck along with ASIL B certification become very complicated due to the LBIST logic and its OCC clocking structure. successfully taped out 9 projects which includes 10 nm technology with Intel foundry and 5nm, 6nm, 12nm & 16 nm 7.5T height technology with TSMC foundry. Efficient in handling blocks for DDR ram IPs.successfully completed project with different technology nodes with less than 1GHz & above 1.8GHz frequency. Roles and Responsibilities :Synthesis using Synopsys DC tool Floorplanning, placement, CTS, Routing Static timing analysisphysical DRC verificationSoC level power and EM analysis. Power integrity analysis and initial Power Mesh creation with respect to the early power anlaysis.Power Grid View Library creation, Tech IR/EM viewsDefining new power mesh for optimal power drop and EM issues at SoC and subsystem levelSOC Level ESD planning and implementationcustom synchronizer cell creationPhysical verification - understanding some of DRCs using DRM files conformal ECO, CLP and LEC• Power analysis Tools HandledSynopsys - ICC2, DC, Prime Time, spyglassCadence : Innovus, Tempus,Voltus Mentor Graphics : caliber Cadence : conformal Equalance check Power analysis : cadence voltus, red hawk Knowledge in languages relevant to the ASIC development process including Verilog and good in TCL Scripting.Good knowledge of RTL synthesis and timing