Nishu Kumari
Design Engineer @Avantel Limited
Warangal, TG, IN
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MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Aug 2024 — Present
Design Engineer @Avantel Limited
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Hyderabad, IN
Designed and tested two FPGA based boards with transceiver, creating schematic and configuring FPGA using Xilinx Vivado & Vitis for high performance applications.
EDUCATION
2022 — 2024
NIT WARANGAL
Master of Technology - MTech
2018 — 2022
UNIVERSITY INSTITUTE OF TECHNOLOGY, BURDWAN
B.E
ABOUT NISHU KUMARI
FPGA/RTL Design, ASIC Design, Low power Design Techniques (UPF/CPF), Linting, CDC, High speed Digital Design ( DDR), Timing Analysis & Optimization, Protocols (SPI, AXI,DDR, JTAG), Digital IC Design
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