Nireesh Thota

About Nireesh Thota

As a Principal Engineer at Arm with over three years in this role and a total of nearly eight years in verification-focused roles, the team specializes in ASIC functional verification, enabling robust design validation for advanced processor architectures. Leveraging expertise in Verilog, System Verilog, and UVM methodologies, they lead collaborative efforts to address complex micro-architecture and pre-silicon debug challenges while adhering to industry protocols such as CHI, AXI, and APB. Their strategic approach fosters scalable, high-performance solutions tailored to the dynamic needs of the semiconductor industry. By driving innovation in test plan creation and verification processes, the team consistently advances the reliability, efficiency, and scalability of modern processor technologies.

Experience

1. Principal Engineer

   Arm

   Apr 2022 — Present · IN

Education

• Jawaharlal Nehru Technological University

  M.Tech, Digital Electronics & Communication Systems

  2004 — 2006

• Jawaharlal Nehru Technological University

  B.Tech, ECE

  1999 — 2003

Skills

• Semiconductors
• Debugging
• Arm
• Vlsi
• Fpga
• Asic
• Vhdl
• Open Verification Methodology
• Functional Verification
• Verilog
• Xilinx
• Systemverilog
• Processors
• Perl