Nirav Patel
Senior Principal Design Verification Engineer @Astera Labs
Fremont, CA, US
EMAILS
n••••••••@asteralabs.com
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Jan 2022 — Present
Senior Principal Design Verification Engineer @Astera Labs
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Santa Clara, CA, US
EDUCATION
2005 — 2009
Ganpat University
B.Tech, Electronics & Communications Engineering
ABOUT NIRAV PATEL
Sr. Principal Design Verification Engineer at Astera Labs
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