Nirav Parmar

About Nirav Parmar

Experience of SOC/IP/VIP verification with SV based UVM/OVM/VMM/AVM methodologies.Experience of eMMC and UFS FPGA level IP Verification. Experience of HSS Serdes/Generic Physical layer of High speed data transfer verification in UVM/SV.Experience of 3D Graphics card verification(SOC) in AVM/SVGood Knowledge of VIP Architect of USB, MIPI-LLI, SONET, OTN verification environment based on SV/UVM/OVM/VMM Experience of SONET, OTN, USB 2.0(OTG), USB 3.0 & MIPI-LLI VerificationProtocol Knowledge : SONET, OTN, USB2.0 with OTG,USB 3.0 with RSP, MIPI LLIInterface: HSS SerdesMethodology : Good Experience of working on UVM/OVM/VMMHVL : Good Working Knowledge of System VerilogHDL worked on : Verilog / VHDLTools Work on : NC,MTI & VCSSpecialities- Expertise in implementation of Verification Environment in UVM/OVM/VMM - Expertise in implementations of Scoreboard, Sequences/Scenarios, Functional coverage- Expertise in writing testcases in UVM/OVM/VMM & in debugging- Sound knowledge of Coverage Driven Verification in SV/ UVM/OVM/VMM- System Verilog SV VIP (Architecture) using UVM/OVM/VMM methodologies- Expertise in implementation of UVC based on individual feature for reuse-ability purpose.

Experience

1. Consultant

   Google

   Aug 2023 — Present · Karnataka, IN

   LOW SPEED IOs SUBSYSTEM VERIFICATION

Education

• Dharmsinh Desai University

  B.Tech., Electronics and Communications

  2003 — 2007

• Nirma University,Ahmedabad,India

  M.Tech., VLSI Design

  2008 — 2010

Skills

• Debugging
• Systemverilog
• C
• Vlsi
• Usb
• Modelsim
• Usb3.0
• Soc
• Asic
• Formal Verification
• Hardware Description Language
• Verilog
• Vhdl
• Application-Specific Integrated Circuits (Asic)
• Veritas Cluster Server
• Vmm
• Open Verification Methodology
• Functional Verification
• Uvm