Niraj Vasudevan
Design Verification Engineer at Intel Corporation
- Role
- Design Verification Engineer at 英特尔
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Niraj Vasudevan
Passionate engineer with a demonstrated history of working in the semiconductor industry. Brings great breadth, having worked in post-silicon/DFT based validation in the past, and also currently working on pre-silicon SoC design and SoC level design verification. Have also constantly collaborated with DFT designers/architects, product/SoC/IP architects, micro-architects and designers, fab process/yield engineers, component debug engineers, tools/automation engineers, across the different roles.
Experience
Design Verification Engineer
Dec 2020 — Present · San Francisco, CA, US
Verification of IPs at SoC and subsystem level
Education
Rochester Institute of Technology
Master of Science (MS), Computer Engineering
2013 — 2015
Anna University Chennai
Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering
2009 — 2013
Skills
- Spring
- Processors
- Microcontrollers
- Matlab
- Computer Architecture
- Junit
- Distributed Systems
- Modelsim
- Fpga
- Embedded Software
- Bash
- Java
- Python
- C
- C++
- Verilog
- Selenium
- Perl
- Embedded Systems
- Embedded C
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