Nipun Agarwala
- Role
- Senior Asic Design Engineer at NVIDIA
- Location
- Palo Alto, CA, US
- LinkedIn followers
- 500 followers
About Nipun Agarwala
My interests lie at the intersection of computer architecture, hardware design and…
Experience
Senior Asic Design Engineer
Jun 2020 — Present
Design and micro-architect new features for future GPUs. Investigate new architectures to accelerate DL and other compute workloads, and look into newer design methodologies.
Education
Delhi Public School, Vasant Kunj
High School Diploma
2010 — 2012
Stanford University
Master of Science (M.S.), Electrical Engineering
2015 — 2017
Bombay Scottish School, Mahim
ICSE Diploma, Science and Math
2007 — 2010
Stanford University
Bachelor of Science (B.S.), Electrical Engineering
2012 — 2016
Skills
- C
- Java
- Linux
- Verilog
- Deep Learning
- Social Media
- Rtl
- Digital Signal Processing
- Computer Architecture
- Algorithms
- Vlsi
- C++
- Python
- Matlab
- Electronics
- Leadership
- Algorithm Design
- Machine Learning
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