Niloy Roy
Sr. Manager Silicon Design Engineering at AMD (AECG)
- Role
- Sr Manager Silicon Design Engineering at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Niloy Roy
Over 18 years of experience in IP development focusing on managing the Logic Debug IP team for last 4 years. Demonstrated experience in System design, System level debug methodology, high speed debug and design best practices for integrating ARM AMBA AXI4 based bus architecture protocol in debug IPs. Architected Versal debug solution while working with multiple cross-cultural development teams across geographies.4 US Patents in next gen debug solution issued.
Experience
Sr Manager Silicon Design Engineering
Jul 2022 — Present · Hyderabad, IN
Education
North Eastern Regional Institute of Science and Technology (NERIST)
B.Tech, Electronics and communication.
2002 — 2006
Skills
- Field-Programmable Gate Arrays (Fpga)
- Hardware Design
- Verilog
- Pspice
- Digital Design
- Embedded Systems
- Tcl
- Integrated Circuit Design
- Microprocessors
- Rtl Design
- Hardware Architecture
- Vhdl
- Simulations
- Digital Signal Processors
- Xilinx
- Microcontrollers
- Modelsim
- C
- Fpga
- Debugging
- Simulink
- Soc
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