Nilesh Upadhye
ASIC DfT Engineer @ Google
- Role
- Asic Dft Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Nilesh Upadhye
Since completing my Master’s in Microelectronics at the prestigious Indian Institute of Science, I\'ve been spearheading Design for Testability (DFT) at Texas Instruments, currently as a Lead Engineer. With over a year and a half in my current role, my journey has been marked by consistent progression and a deep dive into the semiconductor realm. Our team\'s efforts focus on enhancing chip reliability and manufacturability, leveraging my specialized skills to maintain Texas Instruments\' reputation for quality in a competitive industry. Through collaboration and innovation, we\'re setting new benchmarks in DFT that resonate industry-wide.
Experience
Asic Dft Engineer
Mar 2025 — Present · Bengaluru, IN
Education
Indian Institute of Science (IISc)
Master of Technology, Microelectronics
2016 — 2018
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