Nikhila Chandrashekhar
Design Verification Engineer at Google
- Role
- Asic Design Verification at Google
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Nikhila Chandrashekhar
Nikhila is a ASIC Design Verification Engineer at SanDisk Corporation in the Enterprise SSD Solutions team. She is responsible for Verification of various Top level modules, including several IPs in the 3d nand BiCS memory controller Snowbird. She has a Masters Degree in Electrical Engineering (VLSI) from the University of Southern California. She has formerly worked as an intern in the Enterprise Storage Solutions team at SanDisk, and has interned at various branches of Bosch Ltd. With this experience under her belt, she possesses the right technical skills and functional expertise to be a productive and contributing member in the VLSI industry.As a designer and verification engineer, she can comprehend a problem well and come with up with creative solutions to solve it. She is also great team member, a responsible leader and a highly motivated and positive person.HIGHLIGHTS:* She has a technically sound background, with experience as a graduate Intern at Sandisk Corporation (ASIC Development) and 4 internships prior to this.* She has a completed a diverse set of academic projects in areas including RTL Design/Verification/Synthesis, NetFPGA, VLSI System Design, Computer Organisation, Layout Design and Static Timing Analysis.* She also has 3 paper presentations and 1 publication to her credit.* Her interests include: RTL Design/Verfication/Synthesis, Digital & Logic Design, NetFPGA and Implementation, Computer Organisation, PCIe.SKILLS:* Languages : Verilog, System Verilog, Perl, Shell Scripting, C, Embedded C, C++, Assembly Level Language, VB, MATLAB* Hardware: Xilinx Virtex 2 Pro, 32 bit Power PC Processor, Rexroth PLC, Microcontrollers(Atmel 8051,NXP AT89V51RD2)* Software & OS: Xilinx ISE,Synopsys Tools, CADENCE Virtuoso, Schematic L, Layout GXL, Chip Assembly Router, MentorGraphics- ModelSim, MathWorks, Orcad Demo, AutoCAD 2011. OS : Unix, Windows, Mac OS.
Experience
Asic Design Verification
Nov 2022 — Present · San Francisco, CA, US
Education
University of Southern California
Master of Science (MS), Electrical and Electronics Engineering
2013 — 2014
Visvesvaraya Technological University
Bachelor of Engineering (BE), Electrical and Electronics Engineering
2009 — 2013
Harvard Business School Online
Business/Managerial Economics/Credetial Of Readiness
2016 — 2016
Skills
- Microprocessors
- C++
- Cadence
- Awk
- Xilinx Ise
- Field-Programmable Gate Arrays (Fpga)
- Matlab
- Hardware Architecture
- Assembly Language
- Xilinx
- Systemverilog
- Fpga
- Microcontrollers
- Assembly Level Programming
- Cmos
- Sed
- Netfpga
- C
- Very-Large-Scale Integration (Vlsi)
- Shell Scripting
- Embedded C
- Autocad
- Synopsys Tools
- Pcie
- Visual Basic
- Modelsim
- Perl
- Cadence Virtuoso
- System Verilog
- Memory
- Verilog
- Pspice
- Microsoft Office
- Vlsi
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