Nikhil Matkar

About Nikhil Matkar

I am a graduate of Arizona State University, studied Electrical Engineering (MSE) program specializing in Electronic and Mixed-signal circuit design with 3+ years of professional full-time experience in physical design implementation, timing signoff, physical verification, other signoffs, analog and digital circuit design, chiplet-based heterogeneous integration and 3 projects tape-out on 16nm,12nm technology seeking internship/co-op opportunities starting Spring 2024. I also have 2.6 years of MNC client experience. I am a quick learner with a fervent interest in the Semiconductor Industry\'s technological advancement, and challenges related to it.CORE COMPETENCYHands-on Experience in Physical Design - Floorplan, Powerplan, Placement, Clock Tree Synthesis, Pre & Post Route, ECO Timing fixing, DRVs fixing, DRC/LVS cleaning, STA at the block level. Worked on 90nm,65nm,45nm,16nm, and 12nm technology, and have sound practical experience with the major EDA tools used for PD. Project experience in Physical Design. Capable of dealing with the entire Back End Physical Design flow with a good understanding of ASIC design flow. Good Communication and Presentation Skills.Languages knownC, VerilogEDA Tools knownCadence - Genus, Innovus, Tempus, Virtuoso, SpectreSynopsys - Fusion Compiler, HSPICEMentor Graphics Calibre, LynxNXT AutomationScripting language known TCL, Shell, PythonOperating systems Windows, Linux

Experience

1. Cpu Implementation Engineer

   Arm

   Feb 2025 — Present · Raleigh, NC, US

   Working in CPU Implementation - Physical Design team building CPUs within Arm. Focused on CPU development & PPA proving/feedback during RTL development

Education

• Arizona State University

  Master's degree, Electrical and Electronics Engineering

• University of Mumbai

  Bachelor of Engineering (B.E.), Electrical and Electronics Engineering

  2014 — 2018

• Ramnarain Ruia College - Mumbai

  Higher secondary school, Computer Science

  2012 — 2014