Nikhil Kumar Patwari

Physical Design Engineer at Intel Corporation

Role
Physical Design Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

Experience

  1. Physical Design Engineer

    Intel

    Oct 2018 — Present · Bengaluru, IN

    1) Roles and Responsibilities:• Performed a wide range of back-end activities, including Floorplan design, RTL synthesis, PnR, CTS, Timing closure (STA), DRC, Antenna checks • Conducted multiple sessions for FTEs on optimized way of FP Design & use of RLS flow for partition convergence2) Section Floorplan Owner:• Planned high quality floorplan freeze of FTL sections with high pin density, FDI hips & macro placements• Maintained higher utilization with 25Mn Gate counts of the most critical section in terms of wires exchanged to reduce area consumption • Modified data flows to reduce pin density across interfaces to accommodate TSVs without compromising quality and chip specifications 3) Section Execution Owner:• Led team of 5 to deliver 12 partitions with utmost quality of routing, timing and caliber convergence • Generated scripts for custom routing and relaying of analog nets connecting different tiles4) Partition Execution Owner:• Converged varied complex partitions with high utilization (~70%), 4Mn Gate counts and 6K feedthroughs• Used different techniques to place RPs and repeaters to minimize timing & routing convergence during ECO• Executed Tweaker and different custom scripts to converge 65K min & 15K max violations across interfaces occurring due to high min-max skew differences5) Section Timing Owner:• Planned repeaters with respect to processes used for latency and RP depths reduction• Generated partition related recipes with different relaying techniques to straighten and buffer feedthroughs to reduce routing and timing complexities

Education

  • National Institute of Technology Rourkela

    B.Tech and M.Tech

    2013 — 2018

  • Kalinga Institute of Industrial Technology, Bhubaneswar

    12th

    2011 — 2013

  • D.A.V. Public School, PURI

    Matriculation

    1998 — 2011

Skills

  • Powerpoint
  • Karate
  • Windows
  • Basic C and C++
  • Cadence Virtuoso
  • Microsoft Office
  • Vlsi
  • Design Spark
  • C++
  • Asic
  • Eagle Pcb
  • Arduino
  • Dance
  • Tina
  • Ni Multisim
  • Protius (Circuit Simulation and Designing)
  • Avr Studio 4
  • Event Management
  • Research

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Nikhil Kumar Patwari — Physical Design Engineer at Intel in Bengaluru, KA, IN | Unifers