Nihal Jain
Engineering Manager at Intel Corporation
- Role
- Engineering Manager at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Nihal Jain
Have experiencce in the field of Mixed signal layout. worked on leaf cells of SRAM memory layout using 28nm node of jazz semiconductorsHands on experience in Mentor Graphics - Pyxis Layout, CalibreCadence Virtuoso layout editor
Experience
Engineering Manager
Jan 2024 — Present · Bengaluru, IN
Education
KLEIT
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering
2008 — 2012
Basel Mission English Medium High School
schooling, English
1994 — 2006
Skills
- Floorplanning
- Virtuoso
- Sram
- Cadence Virtuoso
- Vlsi
- Cmos
- Analog Circuit
- Lvs
- Physical Design
- Eda
- Static Timing Analysis
- Digital Electronics
- Drc
- Cadence Virtuoso Layout Editor
- Analog Circuit Design
- Asic
- Semiconductors
- Integrated Circuit Design
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