Nidhi Chandak
Senior ASIC Design Engineer at NVIDIA
- Role
- Senior Asic Design Engineer at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Nidhi Chandak
Hardware Engineer with interests in the field of VLSI and Computer Architecture.Job experience in RTL Design and Synthesis using cutting edge tools.
Experience
Senior Asic Design Engineer
Mar 2018 — Present · Bangalore, IN
RTL Design for the PCIE (Gen4/Gen5/Gen6) Unit for Nvidia GPUs- Responsible for Microarchitecture, Verilog coding and timing fixes for the Transaction Layer and Physical Layer in PCIE- Coordination with architecture, physical design, verification and neighboring IP teams.Post Silicon Validation and Debug for PCIE (including Gen4) unit in the chip- Writing, scripting and executing testplans. Debugging failures and providing support for the full chip validation- Worked on Gen4 motherboards and used Gen4 Logic Analyzer & Exerciser for the same.
Education
Georgia Institute of Technology
Graduate Certificate in Engineering Entrepreneurship, Entrepreneurship/Entrepreneurial Studies
2014 — 2015
national public school,INR
High School, Computer Science
2005 — 2010
Georgia Institute of Technology
Master's Degree, Electrical and Computer Engineering
2014 — 2015
PESIT
Bachelor’s Degree, Electronics and Communications Engineering
2010 — 2014
Skills
- Visual Basic
- Synopsys Formality
- Verilog-a
- Matlab
- C++
- Visual Studio
- Opencv
- Verilog
- Pspice
- Agilent Ads
- Design Compiler
- Perl
- Multisim
- Cadence Virtuoso
- Vhdl
- Visual C++
- Algorithms
- Xilinx
- Sql
- Linux
- Microsoft Office
- Python
- System Verilog
- Microsoft Excel
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