Neil Panchal
SoC Physical Design Manager at Apple
- Role
- Soc Physical Design Manager at Apple
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Soc Physical Design Manager
Oct 2012 — Present
Skills
- Synopsys Star-Rc
- Ibm Booledozer
- Ibm Chipbench
- Timing Closure
- Tcl
- Asic
- Low-Power Design
- Verilog
- Ddr2
- Clock Tree Synthesis
- Ibm Verity
- Debugging
- Integrated Circuit Design
- Ibm Chipedit
- Synopsys Tools
- Logic Design
- Physical Design
- Floorplanning
- Synopsys Icc
- Cadence Lec
- Ibm Einstimer
- Rtl Design
- Place & Route
- Soc
- Vlsi
- Synopsys Design Compiler
- Constraint Development
- Synopsys Primetime
- Static Timing Analysis
- Signal Integrity
- Cadence First Encounter
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