Neetesh Singh

About Neetesh Singh

XR System Architect | SoC Performance & Power Strategist | Camera Systems & Memory Optimization | Cross-Vendor Use Case ArchitectI specialize in full-stack architecture design for XR systems, owning the translation of product definition (PDM) into actionable SoC-level specifications.🧠 Currently driving architecture efforts at Qualcomm’s XR division, where I: Architect system-wide CPU, GPU, memory, and cache configurations based on worst-case concurrency analysis and IP-level residency profiling Define LLC (Last Level Cache) allocation policies, balancing rendering, composition, and vision workloads to maximize latency-critical buffer residency Model and define peak concurrency matrices to dimension PMIC load curves, including SMPS/LDO rail optimization Create and validate multi-vendor use case blueprints, covering rendering, perception, camera, voice UI, and streaming pipelines Deliver quantitative projections for bandwidth, memory footprint, and power profiles — enabling pre-silicon feasibility studies and SoC tradeoff decisionsWith deep technical ownership in camera systems, embedded performance, and memory hierarchy tuning, I align silicon capabilities with aggressive product goals.My past work spans: Cross-stack optimization: Linux kernel, CPU/GPU scheduling, ION/HEAP memory tuning Compiler performance debugging, cache behavior modeling DevOps pipelines, camera driver bring-up, and SoC validation Vendors and OEMs often consult me for: • Architectural reviews for XR, camera, and multimedia workloads • Thermal-aware power modeling • DDR bandwidth efficiency, TCM/LLC reuse, and pipeline concurrencyLet’s collaborate if you’re designing: XR/MR/AR products New camera pipelines or low-power vision stacks SoC bring-up or pre-silicon platform feasibilityHave Expertise in providing Solutions for scalable Models.Complete ownership of Models for all stages of SDLC for Performance & Compiler Domain.Expert in Devops server setup and execution.Camera Architecture improvement and optimization.Big Data Analysis to find out market demand/Performance Glitch and try to conceptualize the solutions for that.Patent Details:Title: System and Method for Scheduling in a multi-processorApplication Number: 3168/DEL/2015 ADate of filling: 01/10/2015Publication Date: 07/04/2017Always reachable at n••••••••@gmail.com

Experience

1. Staff Engineer Manager

   Qualcomm

   Jul 2022 — Present · Bengaluru, IN

   Leading the Camera Performance Team

Education

• JNV Firozabad

  Intermediate, Science Stream

  2003 — 2007

• Birla Institute of Technology and Science, Pilani

  Master of Technology - MTech, Computer Science

  2016 — 2018

• National Institute of Technology, Patna

  B-tech, Information Technology

  2008 — 2012

Skills

• Sql
• Linux
• Python
• Software Engineering
• Java Enterprise Edition
• Perl
• Java
• C#
• Oop
• Operating Systems
• Databases
• Data Structures
• Css
• Unix
• Mobile Devices
• Information Security Management
• Mysql
• Jsp
• Algorithms
• Mobile Applications
• Android
• J2ee
• Eclipse
• Core Java
• Network Security
• Javascript
• C++
• Pl/Sql
• Oracle
• C
• Programming