Neeraj Kothari

Experience

1. Asic Design Verification Engineer

   NVIDIA

   Jun 2016 — Present · Bengaluru, IN

   Midcore Verification:• Owning and developing Midcore testbench.• Work closely with designers and architects to understand features to be implemented and verified.• Develop verification plan, run and maintain regressions, debug and analyze test results, and report design bugs.• Mentor engineers on the team, manage and track verification development schedules.DGX-FPGA (System Management router):• Understanding of I2C protocol and DGX-FPGA design.• Critical member of DGX-FPGA verif team, responsible for verification of multiple blocks and features of FPGA.• Trained engineers both off-site and on-site.• Received SPOT award.Post-silicon Validation:• Wrote exhaustive self-checking test cases.• Debug using GDB and report.CPU core Verification:• Strong knowledge of CPU core micro-architecture.• Familiar with the cosimulation between the RTL and the micro-architectural C model using System Verilog models.• Worked on core_mix framework which enables the inter-mixability of random/directed tests.• Developed test scenarios to ensure maximum coverage of CPU core features.• Wrote benchmarks for testing cache performance.• Responsible for regression management and debug, functional and code coverage analysis.• Strong debugging and logic skills.• Mentored engineers.

Education

• Birla Institute of Technology and Science, Pilani

  Engineer’s Degree

  2012 — 2016

Skills

• Formal Verification
• Xilinx
• C++
• Tcl
• Matlab
• C
• Microsoft Office
• Verilog
• Arduino
• Linux