Neeraj Dahiya
Design Verification Engineer @NXP Semiconductors
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WORK HISTORY
Design Verification Engineer @NXP Semiconductors
Soc Level verification with interfaces PSI5, SPI, I2C, TMPSI and JTAG using UVM methodology.• Debugging of issues in Gate Level Simulations.• Knowledge of C, Assembly, System Verilog languages. Hands on with scripting in perl and shell.• Handling the Testbench with integration of VIPs and DUT in TB.• Core based verification with assembly language for MCU, Flash and interrupt blocks.• Perform setup for regressions and coverage generation. Analysis of code coverage and functional coverage reports.• Silicon support for interfaces PSI5, SPI, I2C and TMSPI, BDM, Core.• Integration using RABBIT flow and Database management
EDUCATION
Indian Institute of Technology (Banaras Hindu University), Varanasi
Masters in Digital Technique
SKILLS
ABOUT NEERAJ DAHIYA
Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Application-Specific Integrated Circuits (ASIC), Automotive, Microcontrollers, Lean Manufacturing, and Embedded Systems. Strong engineering professional with a Masters in Digital Technique focused in Digital Technique from Indian Institute of Technology (Banaras Hindu University), Varanasi.
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