Nikhil Mane
Sr. Staff Design Verification Engineer at Marvell Semiconductor
- Role
- Sr Staff Design Verification Engineer at Marvell Technology
- Location
- Pune Division, MH, IN
- LinkedIn followers
- 500 followers
About Nikhil Mane
14+ years of experience in the ASIC based Design Verification of the various standards and protocols- Experience in development of Verification Architecture, Test Plan, Test-bench, Test case coding and debugging. Functional Coverage and Code Coverage- Experience in IP & Subsystem Verification.
Experience
Sr Staff Design Verification Engineer
Apr 2021 — Present
Education
Shri Guru Gobind Singhji Institute of Engineering and Technology, Vishnupuri, Nanded
B.Tech, Electronics and Tele-communication
2004 — 2008
International Institute of Information Technology, Pune Infotech Park, Hinjawadi, Pune 411057
Master of Technology (M.Tech.), VLSI
2010 — 2012
Sandeepani School of VLSI Design
Diploma in VLSI design, VLSI
2008 — 2009
Skills
- I2c
- Application-Specific Integrated Circuits (Asic)
- System on a Chip (Soc)
- Asic
- Systemverilog
- Device Drivers
- Spi
- C++
- Matlab
- Verilog
- Debugging
- Very-Large-Scale Integration (Vlsi)
- Vhdl
- Modelsim
- Soc
- Open Verification Methodology
- Functional Verification
- Vlsi
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