Nayyer Irbaz
Cadence Design Systems | Ex-Intel
- Role
- Lead Verification Engineer at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Lead Verification Engineer
Sep 2023 — Present · Bengaluru, IN
Education
National Institute of Technology , Patna
Master of Technology - MTech, Microelectronics and VLSI Design
2016 — 2018
St. Thomas' College of Engineering & Technology 122
Bachelor of Technology - BTech in Electronics and Communication Engineering, Electronics and Communication Engineering
2011 — 2015
Skills
- Teamwork
- C++
- English
- C
- Microsoft Office
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