Nayanendu Biswas
Lead Analog Design Engineer at Cadence Design Systems, Ex-Intel.Indian Institute of Technology, Kharagpur(Alumni)
- Role
- Lead Analog Design Engineer at Cadence
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Nayanendu Biswas
Driving Innovation in High-Speed Communication devices and Mixed-signal Circuit Design. Hands-on experience on Short-Channel planar device technology, FINFET, GAAFET, RibbonFET. Being involved in VLSI domain for last 6 years, I am fully committed to advance the fields of Analog/Mixed-Signal IC design and next-generation high-speed communication systems in terms of PPA improvements.Expertise:* Hands on experience in various ADCs, Bandgap Reference, OpAmp, level-Shifter in lower technology nodes.* Good understanding of PVT, Aging, Dynamic Electrical overstress(EOS), Openrail-EOS, Perc, Assert Check, Openrail HV, Totem-RV, Self-Heating, Tango,Xenon (Noise Analysis), High-Voltage Quick kill, Monte-carlo simulation and Coverage Analysis.* Good in-depth understanding of RC, analog circuits, biasing and small signal models of devices. In addition pole splitting, dominant pole and Miller compensation, pole/zero concept, stability and bode plot i have good expertise* Good in-depth understanding of current mirrors, two stage OpAmp, bandgap reference circuit, Current Reference etc.(Already worked in designs of OTA, BGREF, Level Shifter, Sigma-delta modulator)* Worked in tools like Cadence virtuoso, Synopsys Primetime, MATLAB, Python.Research Interests:1) Analog/Mixed-Signal Design* Sigma Delta Analog-to-Digital Converters* Pipelined Analog-to-Digital Converters* Bandgap Reference Circuit * Level Shifter design * Phase Noise, Jitter2) Analytical Modeling* Developing precise device-to-circuit design optimization techniques.3) Deep Dive into Reliability analysis to make a design more robust and reliable.4) Interests in Artificial Intelligence, Machine Learning Key HighlightsExtensive experience designing ICs for high-speed CPUs. Proficient in creating analytical models that enhance the design and performance of advanced ICs.
Experience
Lead Analog Design Engineer
Apr 2024 — Present · Hyderabad, IN
Education
Indian Institute of Technology, Kharagpur
Master of Technology - MTech, Microelectronics and VLSI design
2019
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.