Navya Pallath
Hardware Design Lead @ Intel Corporation | Approved Patents, Technical Papers
- Role
- Hardware Design Lead at Intel
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Navya Pallath
With over 12 years of professional experience as a Hardware Design Engineer, I am…
Experience
Hardware Design Lead
Jul 2021 — Present
Approved 4 US PatentsDeveloped POC of \"Enhancing performance of Video Conferencing call in low bandwidth scenario\", approved Patent.Technical Paper submissions: Approved paper on Spatial audio evaluation mechanism.
Education
PACE - P A College of Engineering
Bachelor of Engineering (B.E.), Telecommunications Engineering
2009 — 2013
Skills
- Microsoft Excel
- Research
- Windows
- Matlab
- English
- C#
- Embedded Systems
- Embedded C
- Html
- Orcad Capture Cis
- C
- Teamwork
- C++
- Microsoft Office
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