Navin Patil
Design Verification Engineer
- Role
- Staff Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Navin Patil
Experienced Design Verification Engineer. Skilled in UVM, Bluespec System Verilog, Verilog, System Verilog, C and C++. Having knowledge of digital design, computer architecture and cache coherency. Strong engineering professional with a Master of Technology (M.Tech.) focused in Digital Systems from College of Engineering Pune.
Experience
Staff Engineer
Dec 2025 — Present · Bengaluru, IN
Education
COEP Technological University
Master of Technology (M.Tech.), Digital Systems
2016 — 2018
Progressive Education Society's Modern College of Engineering
Bachelor of Engineering (BE), Eleatronics and Telecommunication Engineering
2012 — 2015
Walchand College of Engineering , Sangli
Diploma, Industrial Elecronics
2009 — 2012
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.