Naveen Tellakula
Senior Manager @AMD
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WORK HISTORY
Senior Manager @AMD
Hyderabad, IN
EDUCATION
JNTUH College of Engineering Hyderabad
Master's degree, VLSI
SKILLS
ABOUT NAVEEN TELLAKULA
Technical Management Professional with 20 years of experience in ASIC & FPGA based product development• Proficient in SOC,IP and FPGA Hardware product development Life Cycle• Provide System level solutions (System Design and Use model definition)• Design Services and building reference designs• Contribute towards Product definition• Pre (Emulation and Prototype) and Post Silicon Validation• Soft IP Validation and RTL design • Board design and debug, Diagnostic firmware development in C• Support and Debug Customer issues• Ability to lead and work in cross-functional teamsHands on working knowledge in:o SERDES architectures, PCIe, Ethernet (10Mbps to 800Gbps),USXGMII, SDI, Interlaken, CPRI, JESD, Memory subsystems (NVM, DDR), AMBA (AXI, AHB and APB), Low speed peripherals. o ARM (Cortex-M1, M3) and RISC-V processorso Extensive knowledge on Microchip (formerly Microsemi) FPGAs and the associated tool flow (Design, Synthesis, STA, timing closure, Place and route)o Well versed with Xilinx FPGA architectures and the associated tool flowso Well versed with Lab toolso Good Signal integrity concepts
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