Naveen Balgare
Googler | Samsung | NVIDIA | NIT Calicut | Topmate Mentor | DV Content Creator | Design Verification Engineer | UVM | SV | Verilog | AMBA Protocols
- Role
- Design Verification Engineer at Google
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Naveen Balgare
I am Naveen Balgare from Hyderabad, Telangana. I am currently pursuing my M.Tech in Electronics Design & Technology from NIT Calicut. I had completed my Bachelor of Engineering from Matrusri Engineering College, Hyderabad. I am good at programming languages like Verilog, system Verilog, C, and C++. I am a very enthusiastic and passionate about latest technologies.
Experience
Design Verification Engineer
Jun 2024 — Present · Bengaluru, IN
Education
National Institute of Technology Calicut
Master of Technology - MTech, Electronics Design & Technology
Matrusri Engineering college
Bachelor of Engineering - BE, Electronics & Communication Engineering
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