Naresh Pulipati

Technical Lead at HCL Technologies

Role
Technical Lead at HCLTech
Location
Vijayawada, AP, IN
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

About Naresh Pulipati

Having good experience in embedded hardware development and product design in the area of requirements capture, architecture, schematic design, development, PCB guideline & layout review, design validation & verification test, qualification. Experience in high speed, analog, digital and mixed signal circuit design & analysis, jitter, crosstalk and channel loss budgeting, signal integrity(SI) and power integrity(PI) analysis, EMI/EMC/ESD, DFM/DFT/DFA, cost analysis, worst-case and stress analysis, timing analysis, thermal estimation, power budgeting & power supply design, reliability prediction, FMEA and root cause analysis. Handled complex RAID controllers, Microcontroller, FPGA, CPLD based designs.Hands on experience in high speed testing, debug, power supply testing, bring up testing, DVT and non-electrical testing. Handled high frequency Oscilloscopes, spectrum analyzers, TDR, Network Analyzers, BERT, VNA Hands on experience in Post Silicon Validation PCIe Gen5, CEI.knowledge in latest technologies like PCIe, DDR3, DDR4, NVMe, M.2 SSD, SAS/SATA, Ethernet, USB, ONFI NAND, NOR, SPI, I2C and other industrial standards.

Experience

  1. Technical Lead

    HCLTech

    Oct 2021 — Present · Vijayawada, IN

Education

  • Nettur Technical Training Foundation, Trivandrum, Kerala

    DIPLOMA, ELECTRONICS

  • ANDHRA PRADESH

    Applied Science, Mathematics, Engineering Drafting

  • Acharya Nagarjuna University

    Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

    2009 — 2019

Skills

  • Electronics
  • Fpga
  • Asic
  • Hardware Architecture
  • Orcad
  • Flex
  • Schematic Capture
  • Analog
  • Modelsim
  • Pcb Design
  • Cadence

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Naresh Pulipati — Technical Lead at HCLTech in Vijayawada, AP, IN | Unifers