Naresh Marikanti
Physical Design Engineer(VLSI) at Capgemini pvt ltd Hyd
- Role
- Physical Design Engineer at Capgemini Engineering
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Naresh Marikanti
6.5 years of experience in physical design flow, worked on various technologies till 5 nm, worked on various IPs like High speed clock synthesis, Floor planning and Timing Tree synthesis. Have hands-on experience with STA and LVS DRC, tile closure with good quality, working with different clients.
Experience
Physical Design Engineer
Oct 2021 — Present · Hyderabad, IN
Senior Physical design engineer
Education
Jawaharlal Nehru Technological University, Hyderabad
Master of Technology - MTech
2015 — 2017
BITS
Bachelor of Electronics (B.Eng.)
2011 — 2014
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