Namsakhi Kumar

Design Engineer @Microchip Technology Inc.

Vancouver, BC, CA

Designed radiation-hardened RTL blocks for the High Performance Spaceflight Computing (HPSC) SoC for NASA JPL, including the Arteris Network-on-Chip (NOC) block and AXI Trace Buffer within the DDR memory subsystem• Developed AXI Trace Buffer for DDR transaction profiling, featuring a circular buffer, to capture AXI read/write transactions with timestamping for efficient debugging.• Designed and implemented the Arteris DDR NOC with support for memory mapping, transaction reordering, QoS-based arbitration & ECC protection across EDAC interfaces• Integrated FlexNoC resilience features to detect permanent and soft hardware faults across NoC interfaces, with a hierarchical fault aggregator consolidating errors across NOC• Implemented memory-mapped access in the DDR NOC, for NSP ports, ensuring correct routing and in-order responses• Designed synthesizable RTL in SystemVerilog and optimized for PPA (Power, Performance, Area).• Performed Clock Domain Crossing (CDC) analysis using Synopsys VC Static, resolving timing violations and metastability risks and RTL linting with SpyGlass to fix design rule violations and coding guideline violations• Created and validated SDC timing constraints for block-level synthesis and analyzed STA timing reports to resolve setup/hold violations & achieve timing closure.• Experienced with AMBA protocols (AXI, APB), simulation waveforms, bugs, and review coverage metrics• Performed Joules-based power estimate, implemented clock gating, and UPF power intent for power management• Conducted Logic Equivalence Checking (LEC) to verify RTL against gate-level netlists, ensure functional correctness post-synthesis.• Documented hardware operation, including register maps, configuration sequences, observation network, and reset/fault handling to support firmware integration and system bring-up• Currently developing firmware drivers for DDR, Application, and System NoC blocks, handling error reporting, interrupts, and error log