Nakul Sharma

Experience

1. Senior Silicon Engineer

   Google

   Dec 2021 — Present · Bengaluru, IN

   Google’s Pixel Memory Controller’s IP verification ->Responsible for verifying two major blocks of a Google’s memory controller - Request Scheduler and the LPDDR5 PHY Back End. The task entails. Rapid familiarization and integration with the existing testbench to support critical tapeout activities of the previous project while simultaneously updating the verification plan to incorporate new reusable checkers and refine overall test planning. Supervising and guiding a 3-member team, driving rapid feature execution and ensuring on-time delivery of verification milestones to higher-level integration stages.Chip level verification of Clock Tree & Audio Datapath in Google Pixel buds->Successfully handled the verification of Clock tree and Audio Datapath in a team of 4. This includes. Quick Adoption and Improvisation on the existing testbench to support new architecture, concurrently updating the verification plan to incorporate reusable checkers and refine test planning. Extensive cross-site collaboration with the architecture team to ensure requirement clarity. Mentoring teammates and contractors, fostering faster progress and knowledge sharing. Comprehensive debug and technical support to multiple teams (SiVal, SW, etc.) for chip programming sequences and during silicon bring-up, participation in validation activities.Subsystem level verification of Control Plane & Dataplane in Memory SubSystem in Pixelsmartphones ->. Successfully designed and implemented the verification infrastructure for control plane scenarios in the Memory Subsystem within a condensed timeframe. Maximized reusability by adapting an existing fabric protocol (iWlink IP) environment into a layered testbench architecture, designed for smooth vertical integration. Comprehensive documentation facilitated widespread adoption across multiple sub-systems. Executed thorough testing of key SLC features at the Memory Subsystem level, leveraging the developed testbench.

Education

• Translam Academy International

  Physics, Chemistry,Mathematics

  2000 — 2008

• Birla Institute of Technology and Science

  B.E. Hons

  2008 — 2012

Skills

• Cadence
• Cadence Virtuoso
• Matlab
• Fpga
• Autoit
• Vlsi
• Verilog
• Pspice
• Xilinx Ise
• Algorithms
• Orcad
• Artificial Intelligence
• Modelsim
• Signal Processing
• Simulink
• Perl
• C++
• C
• Digital Signal Processors
• Xilinx
• Systemverilog
• Vhdl
• Labview
• Perl Automation