Onkar Naik

About Onkar Naik

Hands on experience in Physical design, Physical verification, Signoff & Convergence.> Expertise in Intel tech nodes for signoff, convergence and cleanup.> Good Knowledge of Floor planning, Placement, CTS, Routing and DFM.> Expertise in SD implementation, eco closure and Layout convergence.> Expertise in DRC, LVS solutions.> Expertise in Fusion Compiler, ICC2, ICV, Calibre> Experience in automation of flows and processes.> Good understanding of TCL,Perl and Linux Commands.

Experience

1. Soc Physical Design Engineer

   Intel

   Jul 2017 — Present · Bengaluru, IN

   SD implementation on the latest technology nodes to achieve better PPA targets.• Efficient floor planning, UPF-based PNR, clock tree analysis, power and signal integrity, formal logic and low power equivalence check, timing closure with ECOs, and physical verification (LVS/DRC/Antenna, etc.)• Hands on experience of Physical layout verification of blocks and full chip on multiple Intel tech nodes tape outs.• Proficient at automation scripts to enhance the tool flow to optimize the runtime, avert manual efforts and to resolve the design issues reported in PNR or signoff activities.• Experience of Full Chip LV integration, resolving SoC full chip-level interface as well as block-level DRCs along with other signoff checks.• Led and mentored the new team to deliver a high-quality layout of all blocks and SoC.• Managed multiple critical layout blocks effectively before tape out days.• Work with IP team to get clean IP as per the requirement of the project and its environment, analyze design layout according to rules checks for final delivery to fabrication.

Education

• University of Mumbai

  Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering

  2011 — 2014

• Vellore Institute of Technology

  Master’s Degree, VLSI

  2015 — 2017

• Ramnivas Ruia College, Matunga

  High School, Computer Science

  2008 — 2010

Skills

• Project Management
• Microsoft Word
• Team Leadership
• Perl Automation
• C++
• Verilog
• Matlab
• Microsoft Office
• Microsoft Powerpoint
• Teamwork
• Team Management
• Tcl-Tk
• Java
• Python
• Static Timing Analysis
• Embedded C
• C
• Programming
• Altera Quartus
• Cadence Virtuoso
• Application-Specific Integrated Circuits (Asic)
• Physical Verification
• Modelsim
• Powerpoint
• Microsoft Excel
• Xilinx Ise
• Windows