Nagender Patel
Senior Silicon Design Engineer @ AMD
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Nagender Patel
Contributed to the design and development of RoCEv2 IP for high-speed data transmission. Designed and implemented a video application leveraging RoCEv2 IP, enabling seamless transfer of Full HD video data to a server at a speed of 30 frames per second.Optimized the integration of video capture and transmission pipelines to achieve real-time performance over high-speed networks.=>Experienced Design Engineer with a demonstrated history of working in the electrical and electronic manufacturing industry. Skilled in Verilog and VHDL.Four years of experience on RTL development for required applications. Worked on DSP based applications like implementation of IIR Band pass filter, FFT\'s, beam formation algorithms. worked on protocols like AXI,SPI,I2C,CAN,FPGA to FPGA, aurora protocol, communications. worked on peripherals like ADC\'s, DAC\'s, NAND FLASH,NOR FLASH, SRAM,NVRAM,MRAM,DDR,Ethernet,USB. Worked on 7 series\'s FPGA family like Kintex, Zynq SOC, Kintex Ultra-scale.
Experience
Senior Silicon Design Engineer
May 2025 — Present · Hyderabad, IN
Education
Mother Teresa
Bachelor of Technology (B.Tech.), Electrical, Electronic and Communications Engineering Technology/Technician
Kbr Engineering College
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
2010 — 2014
Guru Nanak Institutions Technical Campus
Master's degree, VLSI SYSTEM DESIGN
2014 — 2016
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.