Nagaraju Ramavath
58k+ followers @LinkedIn | Design Verification Engineer | RTL Design | Computer Architecture | AHB-APB | UVM, SVA, Verilog, SystemVerilog | 40M+ Impressions | Research @ IISc Bangalore Advancing Semiconductor Learning
- Role
- Content Creator at YouTube
- Location
- Jaipur, RJ, IN
- LinkedIn followers
- 500 followers
About Nagaraju Ramavath
I am a VLSI Design and Verification Engineer with a strong focus on RTL design, functional verification, and pre-silicon validation, working towards building reliable, silicon-ready digital systems.I have hands-on experience with SystemVerilog, Verilog, UVM, and SVA, and have worked on developing scalable UVM testbenches, debugging complex RTL issues, and ensuring functional correctness using constrained-random and assertion-based verification methodologies.My technical experience spans RTL architecture definition, FSM-based control logic, protocol design and verification, and industry-aligned projects including AHB-to-APB bridge design, Router 1×3 architecture, FIFO design & verification, and serial communication protocols (SPI, I2C, UART).I also have exposure to ASIC and SoC design flows, including simulation, coverage analysis, static timing analysis (STA), and a foundational understanding of physical design concepts such as synthesis, placement, routing, and timing closure.Additionally, my experience with semiconductor fabrication and characterization at IISc Bengaluru has strengthened my understanding of how design and verification decisions translate into silicon behavior.I am passionate about contributing to high-impact ASIC and SoC teams and am open to discussions, collaborations, and opportunities aligned with Design Verification, RTL Design, and VLSI engineering roles.
Experience
Content Creator
Jul 2025 — Present
I talk about VLSI design, chip design, and semiconductor technology on my channel. I also post weekly videos about digital design concepts, Verilog/SystemVerilog, verification, and real-world applications in the electronics industry. I share insights from my projects and learning journey to help students and engineers explore the world of VLSI. You\'ll find tutorials, project walkthroughs, and discussions on the latest in semiconductor and EDA tools
Education
Indian Institute of Science - IISc
Trainee
2025 — 2025
Malaviya National Institute of Technology Jaipur
Bachelor of Technology - BTech
Sri Chaitanya College of Education
Junior high / intermediate/ middle school Education and Teaching
2018 — 2020
Government High School
Telanagna state board of secoundary education
2016 — 2018
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.