Nadine-Marie Bell

About Nadine-Marie Bell

I have worked in engineering for seven years using the below programming languages and tools/systems. Currently, I work as a SoC Design Verification Engineer at Intel verifying functionality of system on a chip (SoC) for the basestation of cellular towers that enhance 5G capability. RELEVANT SKILLS- Programming Languages: Verilog/System Verilog; MATLAB; VHDL; C; C+; C++; Python; Perl; UVM/OVM; SQL- Engineering Tools: Git; PSPICE (OrCAD); Pro-Engineering; Synopsis; Verdi; Confluence; JIRA- Operating Systems: Linux/Command Line; Windows- Hardware: Arduino; Altera DE2-115 Development & Education Board; Tektronix MSO2014 Mixed Signal Oscilloscope; BK precision Triple Output Digital Power Supply 1652; Tektronix AFG3021B Single Channel Function Generator- Microsoft Applications: SharePoint; Excel; PowerPoint; Word; Outlook; Microsoft CRM (Dynamics 365)

Experience

1. Soc Design Verification Engineer

   Intel

   Feb 2019 — Present · Allentown, PA, US

   Manage and enhance an in-memory database that provides mapping of 500+ endpoints in the SoC thus improving performance and feature accessibility- Develop strategies for pre-silicon validation of blocks in a SoC to comply with client requirements and specifications- Validate block/sub-system level logic design (Register Transfer Language (RTL)) using various coding languages- Create testbenches that can be integrated/re-used for different IP’s to improve testability and efficiency- Define and implement reference models, checkers, coverage, and test drivers to monitor SoC functionality- Perform digital circuit verification and layout, and digital block synthesis- Align validation activities and work cross functionally with development, architecture, design, software, and firmware teams to identify project scope and ensure 100% coverage- Provide SoC “runtime profiling” by running scripts that report out a testbench’s overall performance and usage- Conduct data analysis on coverage and runtime reports to provide resources for capacity and usage planning- Coordinate and report status of validation/testing activities to ensure proper communication across 10 teams- Verify functionality of systems on a chip (SoC) for the basestation of cellular towers that enhance 5G capability.

Education

• Montgomery College

  Associate of Science (A.S.), Electrical and Electronics Engineering

  2016

• Howard University

  Bachelor of Science (B.S.), Electrical and Electronics Engineering

  2017 — 2019

Skills

• Data Entry
• Teamwork
• Social Media
• Public Speaking
• C++
• Outlook
• Research
• English
• Microsoft Word
• Customer Service
• Microsoft Office
• Photoshop
• Microsoft Excel
• Powerpoint