Muskan Pashine

Cpu Verification Engineer @AMD

Santa Clara, CA, US
EMAILS
m••••••••@amd.com
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Oct 2024 — Present

Cpu Verification Engineer @AMD

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Santa Clara, CA, US

Working on CPU core-level verification primarily focused on test planning, microarchitecture features, x86 feature enablement, stimulus development, debugging, and coverage closure for ISA and uarch features.

EDUCATION

N/A

Shri Ramdeobaba College of Engineering and Management

Bachelor's degree, Electronics

N/A

Portland State University

Master of Engineering - MEng, Electrical and Computer Engineering

ABOUT MUSKAN PASHINE

I am currently pursuing my Master’s in Electrical and Computer Engineering at Portland State University with a major in Computer Architecture and Digital Design Verification. Working with Professor Venkatesh Patil as a Grader of the ECE course Pre-silicon Validation and Verification.Currently, I am seeking Internship/Full-Time opportunities for RTL/ASIC/SOC Design Verification/Validation or Computer Architecture roles to make valuable contributions to the company.I have hands-on experience with QuestaSim, VC Formal, Computer Architecture, RTL coding, FPGA Synthesis, SystemVerilog assertions, Formal Verification and Coverage driven Verification, constraint randomization, and UVM.

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