Muralidharan Sivalingam
CPU Design Verification Engineer
- Role
- Senior Principal Engineer at Ampere
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Muralidharan Sivalingam
Interested in Design Verification, Computer Architecture, Operating Systems, ASIC Design and Validation
Experience
Senior Principal Engineer
Mar 2020 — Present · Portland, OR, US
Education
SSN College of Engineering
Bachelor of Engineering, Electronics and Communication Engineering
2006 — 2010
University of Wisconsin-Madison
Master's degree, Electrical and Computer Engineering
2012 — 2014
New Prince Matriculation Higher Secondary School
Computer Science
2006
Skills
- Matlab
- Ibm Mainframe
- Microprocessors
- X86 Virtualization
- Debugging
- C++
- Digital Ic Design
- Jcl
- Regression Testing
- Systemverilog
- Altera Quartus
- Verilog
- Operating Systems
- Rexx
- X86 Assembly
- Silicon Validation
- Databases
- Computer Hardware
- Computer Architecture
- Cobol
- Specman
- C
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